The present invention relates to a phase change memory device and a method for manufacturing the same, and more particularly, to a phase change memory device that can prevent thermal cross-talk due to high integration of a device.
Generally, memory devices can be classified divided into volatile RAM (random access memory), which loses inputted information when power is interrupted, and non-volatile ROM (read-only memory), which can continuously maintain the stored state of inputted information even when power is interrupted. Volatile RAM may include DRAM (dynamic RAM) and SRAM (static RAM) and non-volatile ROM may include, a flash memory such as an EEPROM (electrically erasable and programmable ROM).
It is well known that DRAM is an excellent memory device, however DRAM requires a high charge storing capacity and since the surface area of an electrode must be increased, it is difficult to accomplish a high level of integration. Further, flash memory stacks two gates on one another requiring a high operation voltage when compared to a source voltage. Accordingly, since a separate booster circuit is needed to form the necessary voltage for write and delete operations, it is difficult to obtain a high level of integration.
Research to develop a novel memory device having a simple configuration and capable of accomplishing a high level of integration while retaining the characteristics of non-volatile memory has been made. For example, a phase change memory device has recently been disclosed in the art.
In a phase change memory device, a phase change occurs in a phase change layer interposed between a lower electrode and an upper electrode. The phase change layer changes from a crystalline state to an amorphous state due to current flow between the lower electrode and the upper electrode. The information stored in a cell is determined by the medium difference in resistance between the crystalline state and the amorphous state.
In detail, in the phase change memory device a current is applied to a phase change material such as a compound made of germanium, stibium and tellurium (Ge—Sb—Te: GST) and a compound made of argentum, indium, stibium and tellurium (Ag—In—Sb—Te: AIST). The phase change material undergoes a phase change between the amorphous state and the crystalline state by heat (e.g. Joule heat). Accordingly, in the phase change memory device the specific resistance of a phase change layer in the amorphous state is higher than the specific resistance of the phase change layer in the crystalline state. In a read mode, sensing the current flowing through the phase change layer determines whether the information stored in a phase change memory cell has a logic value of ‘1’ or ‘0’.
Meanwhile, in a conventional phase change memory device, as shown in FIG. 1, cylinder type heaters 140 are located in respective cells of a semiconductor substrate 100 that has a plurality of phase change cell regions. A nitride layer 160 is formed to have an opening 160h that is shared by two cylinder type heaters 140 of adjoining cell regions. The stack pattern of a phase change layer 170 and upper electrodes 180 is located on the nitride layer 160 that has the opening 160h. 
However, in the conventional phase change memory device, as the size of a phase change memory device decreases, the distance between two cylinder type heaters 140 formed in the cells gradually decreases. Therefore, thermal cross-talk being an undesired phase change phenomenon occurs in an adjoining portion of the phase change layer 170 under thermal influence where Joule heat generated within the radius at the interface between the cylinder type heater 140 and the phase change layer 170 decreases.
In FIG. 1, reference numeral 110 designates an interlayer dielectric, 120 lower electrodes, and 130 and 150 insulation layers.
The thermal cross-talk is likely to change the data stored in the phase change cell or adversely influence the phase change cell thereby decreasing a sensing margin.